S
SOMAYEH
Guest
Bok ljudi,
Mogao bilo tko ići naprijed i graditi nešto?
Bilo koji zanimljiv to udio?
Pozdrav,
Mogao bilo tko ići naprijed i graditi nešto?
Bilo koji zanimljiv to udio?
Pozdrav,
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E
EDALIST
Guest
što je problem?
možete koristiti za generiranje Xilinx coregen FIFO.
Ako želite generirati vlastiti FIFO, samo koristiti DPRAM, uz svoju adresu brojila i kontrola signala. [/ i]
možete koristiti za generiranje Xilinx coregen FIFO.
Ako želite generirati vlastiti FIFO, samo koristiti DPRAM, uz svoju adresu brojila i kontrola signala. [/ i]
I
it_boy
Guest
ovi dokumenti bi moglo biti korisno ako planirate dizajnirati FIFO sami
hxxp: / / www.geocities.com/deepakgeorge2000/vlsi_book/Asynch1.pdf
hxxp: / / www.geocities.com/deepakgeorge2000/vlsi_book/async_fifo2.pdf
hxxp: / / www.geocities.com/deepakgeorge2000/vlsi_book/Asynch1.pdf
hxxp: / / www.geocities.com/deepakgeorge2000/vlsi_book/async_fifo2.pdf
V
Vi
Guest
Možete jednostavno ga graditi.ProbatiGenerirajte skup registara i smjene / rotirati podataka rame uz rame za svaki sat ciklusa.